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I am on the job market seeking a full-time position. I have extensive experience in C++ software development for performance analysis at various levels of the hardware-software stack. I am also proficient in hardware development in Verilog and other hardware description languages as well as ASIC and FPGA design tools.  

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I recently graduated with a Ph.D from University of California San Diego where I was a member of the Microelectronic Embedded Systems Laboratory (MESL) in the Department of Computer Science and Engineering and the NSF Variability Expedition led by Professor Rajesh Gupta. Before joining UCSD, I completed a B.Sc. in Electrical Engineering at Sharif University of Technology where I worked with Professor Maziar Goudarzi in Energy-Aware Systems (EASY) Laboratory.

Journal Publications

Journal Papers

Yield-Driven Design-Time Task Scheduling Techniques for MPSoCs under Process Variation: A Comparative Study

Mahmoud Momtazpour, Omid Assare, Negar Rahmati, Amirali Boroumand, Saeed Barati, and Maziar Goudarzi

IET Journal of Computers and Digital Techniques, Volume 9, Issue 4, July 2015

Impact Factor: 0.639

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Leak-Gauge: A Late-Mode Variability-Aware Leakage Power Estimation Framework

Omid Assare, Mahmoud Momtazpour, and Maziar Goudarzi

Elsevier Journal of Microprocessors and Microsystems (MICPRO), Volume 37, Issue 8, Part A, November 2013

Impact Factor: 1.049

Conference Publications

Conference Papers

Accurate Estimation of Program Error Rate for Timing-Speculative Processors

Omid Assare and Rajesh Gupta

The 56th IEEE/ACM Design Automation Conference (DAC), June 2019

Acceptance Rate: 24% (202/819)

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Strategies for Optimal Operating Point Selection in Timing Speculative Processors

Omid Assare and Rajesh Gupta

The 32nd IEEE International Conference on Computer Design (ICCD), October 2016

Acceptance Rate: 28% (77/276)

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Timing Analysis of Erroneous Systems

Omid Assare and Rajesh Gupta

The 10th IEEE/ACM Embedded Systems Week (ESWEEK), International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2014

Acceptance Rate: 25% (30/117)

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Accurate Estimation of Leakage Power Variability in Sub-Micrometer CMOS Circuits

Omid Assare, Mahmoud Momtazpour, and Maziar Goudarzi

The 15th Euromicro Conference on Digital System Design (DSD), September 2012

Acceptance Rate: 22% (40/181)

Nominated for Best Paper Award

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Opportunities for Embedded Software Power Reductions

Omid Assare and Maziar Goudarzi

The 24th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), May 2011

Posters

Posters and Technical Reports

Approximate Load Value Prediction: A Feasibility Study

Omid Assare

Technical Report, Computer Science and Engineering, University of California, San Diego, June 2015

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Error Detection and Recovery Techniques for Timing Speculative Processors

Omid Assare

Technical Report, Computer Science and Engineering, University of California, San Diego, March 2015

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Clustered Timing Model: Statistical Modeling of Variability for Dynamic Estimation of Errors

Omid Assare and Rajesh Gupta

The 51st IEEE/ACM Design Automation Conference (DAC), June 2014

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